1. Field of the Invention
The present invention relates to an alpha blending calculator which executes an alpha blending calculation .alpha.X+(1-.alpha.)Y in accordance with given digital data X, Y, and .alpha..
2. Description of the Related Art
In recent years, as digital techniques progress, images are more frequently processed in the form of digital data. In various apparatuses handling such digital images, a process called "alpha blending" is often used. The various apparatuses include, for example, an apparatus for applying special effects to images, an apparatus for processing images, and an apparatus for producing images. In the alpha blending process, two images are blended at a predetermined ratio. The alpha blending is accomplished by executing an operation of Expression (1) below for every pixel included in two images. Hereinafter, the operation shown in Expression (1) is referred to as "an alpha blending calculation". EQU P=.alpha.X+(1-.alpha.)Y (1)
where X denotes a digital value of a pixel included in one image, Y denotes a digital value of a pixel included in another image, and .alpha. denotes a predetermined blending ratio.
In order to obtain a single blended image by blending two images, it is necessary to execute an enormous number of alpha blending calculations. This means that it is necessary to execute each alpha blending calculation at a high speed.
Japanese Laid-Open Patent Publication No. 6-83852 discloses a conventional alpha blending calculator. Hereinafter, the conventional alpha blending calculator will be described with reference to FIGS. 7 and 8.
FIG. 7 shows the organization of an alpha blending calculator which executes an alpha blending calculation .alpha.X+(1-.alpha.)Y in accordance with given digital data X, Y, and .alpha.. Each of the digital data X, Y, and .alpha. is 4-bit binary data. In FIG. 7, X.sub.0 through X.sub.3 represent the least significant bit (LSB) to the most significant bit (MSB) of the digital data X, respectively. Also, Y.sub.0 through Y.sub.3 represent the least significant bit (LSB) to the most significant bit (MSB) of the digital data Y, respectively. The digital data .alpha. is a fixed-point number with the binary point to the left of the most significant bit (MSB). The least significant bit (LSB) to the most significant bit (MSB) of the digital data .alpha. are represented by .alpha..sub.0 through .alpha..sub.3, respectively. The reference symbols P.sub.0 through P.sub.7 represent the least significant bit (LSB) to the most significant bit (MSB) of an 8-bit fixed-point number P indicative of the result of the alpha blending calculation .alpha.X+(1- .alpha.)Y. The binary point is located between P.sub.3 and P.sub.4.
The alpha blending calculator includes multiplexers 71 arranged in 4 rows and 4 columns, and an adding section 74 for adding the outputs from the multiplexers 71. The adding section 74 includes half adders 72, full adders 73, and an adder 75 which executes multi-bit addition.
Each of the multiplexers 71 has two data lines for receiving two data inputs and one selection line for receiving selection data. The multiplexer 71 outputs one of two data inputs in accordance with the selection data. Respective bits of the digital data X and Y are input through the data lines of the multiplexers 71, and respective bits of the digital data .alpha. are input through the selection lines of the multiplexers 71.
The outputs of the multiplexers 71 are connected to the half adders 72 and the full adders 73. The half adders 72 and the full adders 73 are arranged in accordance with the organization of array multiplier.
As described above, in the case where the digital data .alpha. is composed of 4 bits, Expression (1) can be transformed into Expression (2) below. EQU P=.alpha.X+.alpha.Y+Y2.sup.-4 ( 2)
When Expression (2) is expanded while the third term of the right side is omitted, Expression (3) below can be obtained. ##EQU1##
Therefore, Expression (3) is the approximation of Expression (2). However, if the number of bits of the digital data .alpha. is increased, the difference between P obtained by Expression (2) and P obtained by Expression (3) becomes small and negligible.
In the alpha blending calculator shown in FIG. 7, the outputs of the multiplexers 71 in the first row and the outputs of the multiplexers 71 in the second row are added. The results of the addition and the outputs of the multiplexers 71 in the third row are added. The results of the addition and the outputs of the multiplexers 71 in the fourth row are added. Then the results of the addition are added considering the carry. As a result, P is calculated on the basis of Expression (3).
FIG. 8 shows the organization of another conventional alpha blending calculator for obtaining complete P shown in Expression (2). In FIG. 8, the meanings of X.sub.0 -X.sub.3, Y.sub.0 -Y.sub.3, .alpha..sub.0 -.alpha..sub.3, and P.sub.0 -P.sub.7 are the same as those described above, and the descriptions thereof are therefore omitted. The alpha blending calculator shown in FIG. 8 includes multiplexers 81 and an adding section 84 for adding the outputs from the multiplexers 81. The adding section 84 includes half adders 82, full adders 83, and an adder 85 which executes multi-bit addition.
The organization of the alpha blending calculator shown in FIG. 8 is different from the organization of the alpha blending calculator shown in FIG. 7 in that Y.sub.0 -Y.sub.3 are input to the adders in the first row (stage). Accordingly, the complete alpha blending calculation shown in Expression (2) can be executed.
The most easiest way for implementing an alpha blending calculator in accordance with Expression (1) is to combine one complementer, two multipliers and one adder. However, such an implementation disadvantageously results in an increase of a circuit scale of the alpha blending calculator. On the other hand, the alpha blending calculators shown in FIGS. 7 and 8 can be implemented in a circuit scale of about one multiplier.
The alpha blending calculators shown in FIGS. 7 and 8, however, utilize the organization of array multiplier to obtain the sum of the outputs of the multiplexers, so that a problem exists in that it is difficult to execute the calculation at a high speed.